A 39-to-45-Gbit

A 39-to-45-Gbit

We describe a 40-Gbit/s-class clock and data recovery (CDR) circuit with an extremely wide pull-in range. A Darlington-type voltage-controlled oscillator (VCO) is newly designed to cover the STM-256/OC-768 full-rate-clock frequencies with a wide frequency margin. We also describe a new lock detector...

詳細記述

書誌詳細
出版年:IEEE Journal of solid state circuits 39, 8 (2004).
第一著者: Nosaka, H.
フォーマット: 論文
言語:English
主題:
39 to 45 Gbit/s.
CDR IC.
CDR circuit.
Darlington-type voltage-controlled oscillator.
FSPC circuit.
InP-InGaAs.
Exclusive-NOR gate.
Frequency acquisition.
Frequency search.
Heterojunction bipolar transistor circuit.
Multidata-rate clock data recovery circuit.
Peak-to-peak jitter.
Phase control.
Phase-locked loop.
Rms jitter.
Robust lock detector.