A 39-to-45-Gbit - Nosaka, H.
We describe a 40-Gbit/s-class clock and data recovery (CDR) circuit with an extremely wide pull-in range. A Darlington-type voltage-controlled oscillator (VCO) is newly designed to cover the STM-256/OC-768 full-rate-clock frequencies with a wide frequency margin. We also describe a new lock detector using an exclusive-NOR gate. The CDR IC was fabricated using InP/InGaAs HBTs. Error-free operation and wide eye opening were confirmed for 40-, 43-, and 45-Gbit/s PRBS with a word length of 231 - 1. We attached a frequency search and phase control (FSPC) circuit to the chip as a new frequency acquisition aid, and this allows the CDR circuit to pull in throughout a 39-45-Gbit/s range. The peak-to-peak and rms jitter of the recovered clock were 3.6 and 0.48 ps, respectively.
Keywords: 39 to 45 Gbit/s.; CDR IC; CDR circuit; Darlington-type voltage-controlled oscillator; FSPC circuit; InP-InGaAs.; Exclusive-NOR gate; Frequency acquisition; Frequency search; Heterojunction bipolar transistor circuit; Multidata-rate clock data recovery circuit; Peak-to-peak jitter; Phase control; Phase-locked loop; Rms jitter; Robust lock detector