Low-power pipeline ADC for wireless LANs. - Arias, J.
In this paper, a 10-bit 40-MS/s analog-to-digital converter (ADC) is presented. A power consumption of 12 mW was achieved by using a time-interleaved and pipelined architecture with shared operational amplifiers. This circuit was fabricated in a 2.5-V 0.25-μm technology with metal-oxide-metal capacitors. Experimental results are within design ranges and are in good agreement with simulation data. It turns out that the proposed Nyquist-rate ADC provides a potential solution for low-power high-speed applications, e.g., wireless LANs.
Keywords: 0.25 micron; 10 bits; 12 mW; 2.5 V; Nyquist-rate ADC; Analog-to-digital converter; Data converter; Low-power pipeline ADC; Metal-oxide-metal capacitors; Pipelined architecture; Power consumption; Shared operational amplifiers; Switched capacitor; Time-interleaved architecture; Wireless LAN