Low-power pipeline ADC for wireless LANs.

In this paper, a 10-bit 40-MS/s analog-to-digital converter (ADC) is presented. A power consumption of 12 mW was achieved by using a time-interleaved and pipelined architecture with shared operational amplifiers. This circuit was fabricated in a 2.5-V 0.25-μm technology with metal-oxide-metal capaci...

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Bibliographic Details
Published in:	IEEE Journal of solid state circuits 39, 8 (2004).
Main Author:	Arias, J.
Format:	Article
Language:	English
Subjects:	0.25 micron. 10 bits. 12 mW. 2.5 V. Nyquist-rate ADC. Analog-to-digital converter. Data converter. Low-power pipeline ADC. Metal-oxide-metal capacitors. Pipelined architecture. Power consumption. Shared operational amplifiers. Switched capacitor. Time-interleaved architecture. Wireless LAN.