A test circuit for measurement of clocked storage element characteristics. - Nedovic, N.
We present a method, on-chip test circuitry, and an error analysis, for accurate measurement of timing characteristics and power consumption of clocked storage elements. The test circuit was fabricated in 0.11 μm CMOS technology and the measurements performed automatically using a serial scan interface. The precision and accuracy of the presented method are demonstrated by the ability to measure entire clock-to-output characteristics of flip-flops. Estimated data-to-output delay systematic measurement error is 6 ps (7%), and random error is 10 ps (11%). The method and the test circuit are applicable for delay measurements of other circuit blocks as well.
Keywords: 0.11 micron; CMOS; Clock-to-output characteristics; Clocked storage elements; Data-to-output delay; Error analysis; Flip-flops.; Measurement circuit; On-chip measurement; On-chip test circuitry; Power consumption; Random error; Serial scan interface; Systematic measurement error; Test circuit; Timing characteristics