A 40-43-Gb 16 demultiplexer in SiGe technology.

A fully integrated OC-768 clock and data recovery IC with SFI-5 1:16 demultiplexer is designed in a 120-GHz/100-GHz (fT/fMAX) SiGe technology. The 16 2.5-Gb/s outputs and additional deskew channel are compliant with the Serdes Framer Implementation Agreement Level 5 specification. The measured bit-e...

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Bibliographic Details
Published in:	IEEE Journal of solid state circuits 38, 12 (2003).
Main Author:	Ong, A.
Format:	Article
Language:	English
Subjects:	1.8 V. 100 GHz. 120 GHz. 2.5-Gb/s outputs. 40 to 43 Gbit/s. 5.2 V. 7.5 W. BICMOS CDR IC. G.8251. OC-768 IC. SONET. Serdes Framer Implementation Agreement Level 5 specification. SiGe technology. Bang-bang. Bit-error rate. Charge pump. Clock and data recovery IC. Deskew channel. Integrated SFI-5 1:16 demultiplexer. Jitter tolerance. Optical fiber communication. Phase detector. Voltage-controlled oscillator.