TY  - JOUR
T1  - Equalization and clock recovery for a 2.5-10-Gb/s 2-PAM
JF  - IEEE Journal of solid state circuits
A1  - Zerbe, J.L
LA  - English
UL  - https://tuklas.up.edu.ph/Record/UP-99796217609277701
AB  - A folded multitap transmitter equalizer and multitap receiver equalizer counteract the losses and reflections present in the backplane environment. A flexible 2-PAM/4-PAM clock data recovery circuit uses select transitions for receive clock recovery. Bit-error rate less than 10-15 and power equal to 40 mW/Gb/s has been measured when operating over a 20-in backplane with two connectors at 10 Gb/s.
KW  - 2.5 to 10 Gbit/s.
KW  - 2.5-10-Gb/s 2-PAM/4-PAM backplane transceiver cell.
KW  - 40 mW.
KW  - SerDes.
KW  - Adaptive equalizers.
KW  - Backplane environment.
KW  - Bit-error rate.
KW  - Decision feedback equalizers.
KW  - Equalization.
KW  - Flexible 2-PAM/4-PAM clock data recovery circuit.
KW  - Folded multitap transmitter equalizer.
KW  - Multilevel systems.
KW  - Multitap receiver equalizer.
KW  - Pulse amplitude modulation.
KW  - Receive clock recovery.
KW  - Select transitions.
KW  - Serial links.
ER  -