An 8-Gb

A full-duplex transceiver capable of 8-Gb/s data rates is implemented in 0.18-μm CMOS. This equalized transceiver has been optimized for small area (329 μm × 395 μm) and low power (158 mW) for point-to-point parallel links. Source-synchronous clocking and per-pin skew compensation eliminate coding b...

সম্পূর্ণ বিবরণ

গ্রন্থ-পঞ্জীর বিবরন
প্রকাশিত:	IEEE Journal of solid state circuits 38, 12 (2003).
প্রধান লেখক:	Casper, B.
বিন্যাস:	প্রবন্ধ
ভাষা:	English
বিষয়গুলি:	0.18 micron. 158 mW. 329 micron. 395 micron. 4 mV 9 ps resolution. 8 Gbit/s. 8-Gb/s simultaneous bidirectional link. Adaptive deskew. Automatic comparator offset trim. Circuit characterization. Coding bandwidth overhead elimination. Complexity reduction. Comprehensive diagnostic capabilities. Equalized transceiver. Full-duplex transceiver. High-speed I/O. Interconnect. Jitter distribution measurements. Jitter reduction. Latency reduction. Noise characterization. On-die eye diagram generation. On-die oscilloscope. On-die waveform capture. Per-pin skew compensation. Point-to-point parallel links. Preemphasis. Self-configuration. Self-testing. Source-synchronous clocking. Time waveform capture. 0.18 μm CMOS.