A second-order semidigital clock recovery circuit based on injection locking.
A compact (1 mm × 160 μm) and low-power (80-mW) 0.18-μm CMOS 3.125-Gb/s clock and data recovery circuit is described. The circuit utilizes injection locking to filter out high-frequency reference clock jitter and multiplying delay-locked loop duty-cycle distortions. The injection-locked slave oscill...
| Yayımlandı: | IEEE Journal of solid state circuits 38, 12 (2003). |
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| Materyal Türü: | Makale |
| Dil: | English |
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