A 16-GHz ultra-high-speed Si-SiGe HBT comparator.

This paper presents an improved master-slave bipolar Si-SiGe HBT comparator design for ultra-high-speed data converter applications. The latch is maintained during the track stage facilitating quick transition back to the latch stage, increasing the sampling speed of the comparator. Implemented in a...

詳細記述

書誌詳細
出版年:IEEE Journal of solid state circuits 38, 9 (2003).
第一著者: Jensen, J.C
フォーマット: 論文
言語:English
主題: