A 1.4-V 10-bit 25-MS

A 1.4-V 10-bit 25-MS

A low-voltage opamp-reset switching technique (ORST) that does not use clock boosting, bootstrapping, switched-opamp (SO), or threshold voltage scaling is presented. This technique greatly reduces device reliability issues. Unlike the SO technique, the opamps stay active for all clock phases and, th...

詳細記述

書誌詳細
出版年:IEEE Journal of solid state circuits 38, 8 (2003).
第一著者: Dong-Young Chang
フォーマット: 論文
言語:English
主題:
0.35 micron.
1.3 to 1.4 V.
10 bit.
21 mW.
55 dB.
LV submicron CMOS process.
Analog-to-digital converter.
Device reliability.
High-speed applications.
Low-voltage technique.
Opamp-reset switching technique.
Pipelined ADC.