A 1.5-V 12-bit power-efficient continuous-time third-order ΣΔ modulator.
This paper presents the design strategy, implementation, and experimental results of a power-efficient third-order low-pass ΣΔ analog-to-digital converter (ADC) using a continuous-time (CT) loop filter. The loop filter has been implemented by using active RC integrators. Several power optimizations,...
| প্রকাশিত: | IEEE Journal of solid state circuits 38, 8 (2003). |
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| প্রধান লেখক: | |
| বিন্যাস: | প্রবন্ধ |
| ভাষা: | English |
| বিষয়গুলি: |