A self-controllable voltage level (SVL) circuit and its low-power high-speed CMOS circuit applications.

A self-controllable voltage level (SVL) circuit which can supply a maximum dc voltage to an active-load circuit on request or can decrease the dc voltage supplied to a load circuit in standby mode was developed. This SVL circuit can drastically reduce standby leakage power of CMOS logic circuits wit...

Πλήρης περιγραφή

Λεπτομέρειες βιβλιογραφικής εγγραφής
Τόπος έκδοσης:IEEE Journal of solid state circuits 38, 7 (2003).
Κύριος συγγραφέας: Enomoto, T.
Μορφή: Άρθρο
Γλώσσα:English
Θέματα: