A single-chip MPEG-2 codec based on customizable media embedded processor.
A single-chip MPEG-2 MP@ML codec, integrating 3.8M gates on a 72-mm2 die, is described. The codec employs a heterogeneous multiprocessor architecture in which six microprocessors with the same instruction set but different customization execute specific tasks such as video and audio concurrently. Th...
| 发表在: | IEEE Journal of solid state circuits 38, 3 (2003). |
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| 格式: | 文件 |
| 语言: | 英语 |
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