A single-chip MPEG-2 codec based on customizable media embedded processor.

A single-chip MPEG-2 codec based on customizable media embedded processor.

A single-chip MPEG-2 MP@ML codec, integrating 3.8M gates on a 72-mm2 die, is described. The codec employs a heterogeneous multiprocessor architecture in which six microprocessors with the same instruction set but different customization execute specific tasks such as video and audio concurrently. Th...

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書目詳細資料
發表在:IEEE Journal of solid state circuits 38, 3 (2003).
主要作者: Ishiwata, S.
格式: Article
語言:English
主題:
MP@ML codec.
Audio coding.
Customizable media embedded processor.
Decoding.
Digital media processing.
Digital signal processor instructions.
Hardware engines.
Heterogeneous multiprocessor architecture.
Instruction set.
Motion compensation.
Real time.
Single-chip MPEG-2 codec.
Very-long-instruction-word coprocessor.
Video coding.