An AI-calibrated IF filter a yield enhancement method with area and power dissipation reductions.

We have developed a large-scale integration (LSI) for Gm-C intermediate frequency (IF) filters, attaining a 63% reduction in filter area, a 26% reduction in power dissipation, compared with existing commercial products using the same process technology and filter topology, and a yield rate of 97%. T...

Täydet tiedot

Bibliografiset tiedot
Julkaisussa:	IEEE Journal of solid state circuits 38, 3 (2003).
Päätekijä:	Murakawa, M.
Aineistotyyppi:	Artikkeli
Kieli:	English
Aiheet:	440 to 470 kHz. AI-calibrated IF filter. Gm-C intermediate frequency filters. Analog LSIs. Analog circuits. Area reduction. Cascaded sixth-order cells. Chip calibration. Double-poly double-metal N-CMOS process. Filter area. Filter topology. Frequency response. Genetic algorithm. Large-scale integration. Optimization problems. Power dissipation reduction. Yield enhancement method. Yield rate.