Design techniques and implementation of an 8-bit 200-MS/s interpolating/averaging CMOS A - Uyttenhove, K.
The design issues and tradeoffs of a high-speed high-accuracy Nyquist-rate analog-to-digital (A/D) converter are described. The presented design methodology covers the complete flow from specifications to verified layout and is supported by both commercial and internally developed computer-aided design tools. The major decisions to be made during the converter's design at both the architectural and the circuit level are described and the tradeoffs are elaborated. The approach is demonstrated for a real-life test case, where a Nyquist-rate 8-bit 200-MS/s 4-2 interpolating/averaging A/D converter was developed in a 0.35-μm CMOS technology. The signal-to-noise-plus-distortion ratio at 40 MHz is 42.7 dB and the total power consumption is 655 mW.
Keywords: 0.35 micron; 40 MHz; 655 mW; 8 bit; 8-bit 200-MS/s interpolating/averaging CMOS A/D converter; Architectural level design; Circuit level design; Computer-aided design tools; Design issues; Design methodology; High-speed high-accuracy Nyquist-rate analog-to-digital converter; Signal-to-noise-plus-distortion ratio; Total power consumption; Tradeoffs; Verified layout