Cita APA (7th ed.)

Xuejue Huang. Loop-based interconnect modeling and optimization approach for multigigahertz clock network design. IEEE Journal of solid state circuits.

Cita Chicago (17th ed.)

Xuejue Huang. "Loop-based Interconnect Modeling and Optimization Approach for Multigigahertz Clock Network Design." IEEE Journal of Solid State Circuits .

Cita MLA (9th ed.)

Xuejue Huang. "Loop-based Interconnect Modeling and Optimization Approach for Multigigahertz Clock Network Design." IEEE Journal of Solid State Circuits, .

Atenció: Aquestes cites poden no estar 100% correctes.