Implementation of a Least Mean Squares (LMS) based ITU-T G.168 digital network echo canceller on a Xilinx Virtex 5 SXT FPGA

Implementation of a Least Mean Squares (LMS) based ITU-T G.168 digital network echo canceller on a Xilinx Virtex 5 SXT FPGA

A digital echo canceller is an adaptive signal processor used to replace echo suppressors in today's modern telecommunications network. ITS main function is to eliminate or at least reduce echo, produced by imperfect signal separation at the hybrid in a public switched telephone network (PSTN),...

全面介紹

書目詳細資料
主要作者: Medina, Keone Karl Apadua
格式: Thesis
語言:English
出版: 2009
主題:
Least squares.
Field programmable gate arrays.
Adaptive filters > Design and construction.
Adaptive signal processing.
Echo suppression (Telecommunication)
Digital echo canceller.
ITU-T G.168.