Style de citation APA (7e éd.)

Alidio, L., Fernandez, J. L., Montes, J. A. G., & Palma, C. M. J. Implementation of a 32-bit dual core ARM7 microprocessor with split-private level one cache and shared level two data cache.

Style de citation Chicago (17e éd.)

Alidio, Lianne, Jose Luis Fernandez, Julie Ann Gaspara Montes, et Camille Mary Joyce Palma. Implementation of a 32-bit Dual Core ARM7 Microprocessor with Split-private Level One Cache and Shared Level Two Data Cache. 2009.

Style de citation MLA (9e éd.)

Alidio, Lianne, et al. Implementation of a 32-bit Dual Core ARM7 Microprocessor with Split-private Level One Cache and Shared Level Two Data Cache.