A high-throughput low-cost AES processor.

A high-throughput low-cost AES processor.

We propose an efficient hardware implementation of the advanced encryption standard algorithm, with key expansion capability. Compared to the widely used table lookup technique, the proposed basis transformation technique reduces the hardware overhead of the S-box by 64 percent. Our pipelined design...

Szczegółowa specyfikacja

Opis bibliograficzny
Wydane w:IEEE Communications magazine 41, 12 (2003).
1. autor: Su, Chih-Pin
Format: Artykuł
Język:English
Hasła przedmiotowe:
0.35 micron.
1.74 Gbit/s.
2.008 Gbit/s.
2.38 Gbit/s.
200 MHz.
CMOS technology.
Advanced encryption standard algorithm.
High-throughput low-cost AES processor.
Key expansion capability.
Nonfeedback cipher mode.
Standard synthesis flow.
Table lookup technique.