A high-throughput low-cost AES processor.
We propose an efficient hardware implementation of the advanced encryption standard algorithm, with key expansion capability. Compared to the widely used table lookup technique, the proposed basis transformation technique reduces the hardware overhead of the S-box by 64 percent. Our pipelined design...
| Published in: | IEEE Communications magazine 41, 12 (2003). |
|---|---|
| Main Author: | |
| Format: | Article |
| Language: | English |
| Subjects: |