00000cab a22000003a 4500 UP-99796217608882532 Buklod 20231007233957.0 m |o d | ta 090623s xx d | ||r ||||| || DENGII eng Shiomoto, K. Scalable multi-QoS IP+ATM switch router architecture. pp. 86-92 This article proposes a scalable multi-QoS IP+ATM switch router architecture. The proposed switch router is based on a core ATM switching system with multi-QoS capability. Forwarding engines and a routing engine are attached in front of the line cards of the ATM switching system. The FEs and RE are interconnected with each other via internal VCs. A novel longest matching algorithm is employed at the FE to achieve packet forwarding at wire-speed of OC-12c rate (622.08 Mb/s). Wire-speed unicast and multicast packet forwarding are performed using point-to-point and point-to-multipoint VCs in a unified way. Because FEs and RE are decoupled from the base ATM switching system, the full spectrum of ATM QoS capability is nicely applied for IP QoS control with a packet classification at the edge of the network. The core switching fabric is scalable from 40 to 160 Gb/s capacity (371 MPPS in terms of packet forwarding throughput). Feedback rate control is employed at each line card to eliminate congestion in the high-speed core switching fabric even with a small amount of buffer. 40 to 160 Gbit/s. 622.08 Mbit/s. ATM switching system. IP QoS control. Buffer design. Feedback rate control. Forwarding engines. Line cards. Longest matching algorithm. Multi-QoS IP+ATM switch router architecture. Packet classification. Packet forwarding throughput. Point-to-multipoint VC. Point-to-point VC. Routing engine. Scalable core switching fabric. Scalable switch router architecture. Wire-speed multicast packet forwarding. Wire-speed unicast packet forwarding. IEEE Communications magazine 38, 12 (2000). FO UPD DENG-II Article