Design and performance of a threshold-based load balancing scheme in an ATM switch.
We consider an ATM switch consisting of a number of output buffered ATM switch elements operating in paralle. Such an architecture may lead to uneven distribution of cells over the parallel switch element buffers, if no modifications
| Τόπος έκδοσης: | Computer networks and ISDN systems. 29, 2 (1997). |
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| Κύριος συγγραφέας: | |
| Μορφή: | Άρθρο |
| Γλώσσα: | English |
| Θέματα: |