Characterization of operational amplifiers implemented in a 90nm CMOS process - Villena, Paul Wilson G.
The scaling of transistor sizes is one of the major catalysts of technology development. However, smaller transistors exhibit higher order effects which requires us to use more complex models to accurately simulate their characteristics. We, at the Intel Microprocessors Laboratory, now have tools required for us to expand our capabilities in designing integrated circuits using the 90nm CMOS technology. Earlier projects were implemented using the 0.25um CMOS process. In view of this recent development, this project will deal with the design, implementation and characterization of the different operational amplifier topologies, specifically Miller, Telescopic Cascode and Folded Cascode, using the 90-nm CMOS technology. The operational amplifier is the basic building block of most analog devices. hence, we must have a comprehensive understanding of its capabilities and limitations when implemented using this new process. This is done by deriving the parameters that characterizes an operational amplifier; the open-loop gain, frequency response, gain bandwidth product, output voltage swing, power consumption, slew rate, and common-mode rejection ration.