A study of the selective power-down techniques for the ARM7 microprocessor - Gahol, Lilibeth Anne P. (2007)
With technology scaling and the need for higher performance and more functionality, power dissipation is becoming a major bottleneck for microprocessor designs. Dynamic switching is the most dominant source of power consumption. Thus, focusing on power optimization techniques that target switching activity will produce a reduction in processor power. In this thesis, selective power-down techniques were used to optimize the power consumption of the ARM7 microprocessor. These techniques include control generated clocking (CGC), control signal gating and precomputation. The effect of each technique on ARM7 microprocessor's power, performance and area was quantified and the effect of their combinations was also studied. The results were then used to evaluate the different selective power-down techniques in terms of their effect on the microprocessor's implementation. This study shows that control-generated clocking achieves the highest power savings followed by control-signal gating. Control-generated clocking reduces total ARM7 power by 16.11% and increases chip area by 1.35% while control-signal gating produces a 6.85% reduction in power and 0.34% increase in total chip area.