Characterization of a first-order sigma-delta analog-to-digital converter implemented in a 0.25um CMOS process - Mangaser, Jose Enrico R.; Villamil, Jeed Marc B.; Zarate, Francis Earl S. (2004)
Analog-to-Digital converters are widely used in communication systems, audio engineering applications and precision measurement devices. One inexpensive implementation of such converters is the sigma-delta architecture. It combines noise shaping and oversampling to achieve high resolution. Converters employing oversampling need not be complex and may permit high tolerance analog components and still produce reliable representations of the analog signals. A sigma-delta converter utilizes a one-bit comparator and a one-bit DAC in the feedback loop. One-bit converters offer linearity and large dynamic range. The goal of this project is to implement for implementations of the analog modulator of the first order sigma-delta analog-to-digital converter in the TSMC 0.25um CMOS process. The four topologies are the single-ended continuous-time, single-ended discrete-time, fully-differential continuous-time, and the fully-differential discrete-time analog modulators. Each analog modulator configuration is a combination of the basic sigma-delta analog modulator blocks: an integrator, a comparator and a 1-bit digital-to-analog converter. All of the circuits were implemented in schematic and layout views. Different process parameters were obtained to evaluate the analog modulators' performance. These parameters included the signal-to-noise ratio, the effective number of bits, and the power consumption among others. The effects of increasing the oversampling ratio were clearly visible from the results obtained in both schematic and layout implementations. The fully-differential configuration contributes in the further improvement of the signal-to-noise ratio since it allows for more input voltage swing. However, it results to more power dissipation due to the presence of more current legs and additional circuit elements. The continuous-time implementations of the analog modulator exhibited lower signal-to-noise ratio and effective number of bits compared to their discrete-time counterparts. The smaller noise power found in discrete-time integrators resulted from its inherent insensitivity to sampling jitters and the elimination of the large resistors in the continuous-time topologies.
Thesis (B.S. E.C.E.)--University of the Philippines Diliman.
Keywords: Analog-to-digital converters; Metal oxide semiconductors, Complementary; CMOS