Implementation of a dynamically reconfigurable encoder-decoder multiplier system using FPGAs

This project is a proof of concept that demonstrates the advantages of in-system reconfiguration and the flexibility of the Field Programmable Gate Array as a reconfigurable unit. Field Programmable Gate Arrays or FPGA's are devices that feature a gate-array like architecture with a matrix of c...

詳細記述

書誌詳細

第一著者:	Antonio, Ginia G.
その他の著者:	Raquepo, Lucita P.
フォーマット:	学位論文
言語:	English
出版事項:	1999.
主題:	Field programmable gate arrays. Error-correcting codes (Information theory) Encoder-decoder-multiplier system. Hamming code. Multiplier system.