APA citiranje

Antonio, G. G., & Raquepo, L. P. (1999). Implementation of a dynamically reconfigurable encoder-decoder multiplier system using FPGAs.

Chicago Style (17th ed.) Citation

Antonio, Ginia G., and Lucita P. Raquepo. Implementation of a Dynamically Reconfigurable Encoder-decoder Multiplier System Using FPGAs. 1999.

MLA citiranje

Antonio, Ginia G., and Lucita P. Raquepo. Implementation of a Dynamically Reconfigurable Encoder-decoder Multiplier System Using FPGAs. 1999.