APA(7版)引用形式

Ciletti, M. D. (1999). Modeling, synthesis, and rapid prototyping with the VERILOG HDL. Prentice-Hall.

Chicagoスタイル(17版)引用形式

Ciletti, Michael D. Modeling, Synthesis, and Rapid Prototyping with the VERILOG HDL. Upper Saddle River, N.J: Prentice-Hall, 1999.

MLA(9版)引用形式

Ciletti, Michael D. Modeling, Synthesis, and Rapid Prototyping with the VERILOG HDL. Prentice-Hall, 1999.

警告: この引用は必ずしも正確ではありません.