A study of snoopy cache coherence protocols for dual processor systems - Fernandez, Edward Bryann C. (2007)
Multiple core processors, specifically dual core processors, are an emerging trend that addresses the need for greater performance and lesser power consumptions. Cache coherence is an issue in multiple processors where multiple copies of data exist in different individual caches of each processor. Incoherence happens due to local processor writes where remote cache copies are left unchanged. This problem is addressed by cache coherence protocols, particularly snoopy cache coherence protocols for low processor counts. The objective of this study is to compare three snoopy cache coherence protocols for a dual processor system, namely Goodman Write-Once protocol, Firefly Write-update protocol, and the MESI protocol. Each protocol was implemented using VHDL and laid-out using 0.25um CMOS standard cells. The designs were analyzed and characterized for performance and power consumption. Results show that MESI protocol leads the Goodman Write-Once and the Firefly Write-Update protocol both for performance and power consumption. The Firefly Write-Update protocol, on the other hand, has the highest possibility of improvement due to its superior hit rate compared to the two protocols. Further study could be extended to the effects of additional hardware optimizations of each protocol.