Hardware emulation of an adaptive minimum bit-error-rate (MBER) beamforming algorithm for wireless communications
In this research, a hardware emulator is implemented for an adaptive Minimum Bit Error Rate (MBER) beamforming algorithm using Altera's Stratix EP1S25 DSP Development Board interfaced with TI's TMS320C6201 DSP Board. A two-element antenna array is used as the receiver. The performance of t...
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| フォーマット: | 学位論文 |
| 言語: | English |
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2006.
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