Hardware emulation of an adaptive minimum bit-error-rate (MBER) beamforming algorithm for wireless communications - Rivo, Jor-El S. (2006)
In this research, a hardware emulator is implemented for an adaptive Minimum Bit Error Rate (MBER) beamforming algorithm using Altera's Stratix EP1S25 DSP Development Board interfaced with TI's TMS320C6201 DSP Board. A two-element antenna array is used as the receiver. The performance of the MBER algorithm is compared to the performance of the widely-used Least Mean Squares (LMS) algorithm. The MBER algorithm directly minimizes the bit error rate (BER) of a communications system instead of the mean square error (MSE). Studies have shown that MBER approach achieves better performance than the classical Minimum MSE approach. In thhis paper, a stochastic gradient based implementation is be used, which allows a sample-by-sample adaptation with a computational complexity similar to the LMS algorithm. For this testbed, BPSK baseband signals are generated internally using the FPGA board. The effects of AWGN and co-channel interference are also simulated using the FPGA board. The complex weights adjustments for the antenna array are computed by TI DSP board. Real-time adaptation is implemented for both the ALBER and LMS approach. The actual BER is used as the basis of comparison for the two approaches. Results show that the ALBER algorithm does indeed perform better than the LMS algorithm in the presence of interference. It was also shown that the data rate achievable by the ALBER algorithm is comparable to that of the LMS algorithm.