A study of the effects of noise matching on the design of RF CMOS low noise amplifiers - Roque, Christian Raymund Koon. (2005)
This thesis presents a study of the effects of optimizing for noise in RF CMOS low noise amplifiers. The effects of (1) the input transistor gate bias voltage, (2) the cascode transistor bias voltage, (3) the supply voltage, (4) source and drain inductors, (5) voltage divider capacitors, (6) capacitor and inductor structure, (7) transistor widths, (8) and the power matching technique used on noise are investigated. Different LNA test structures are designed, fabricated and tested in 0.25um CMOS technology. Analysis and results show that improving the gm of the transistor through a choice of bias voltages will improve the noise performance of the device. It has also been shown that better noise performance can be achieved by varying the device structure and implementation. Actual noise figure measurements also demonstrate the importance of well matched input and output networks. A highly degraded input and output match could yield higher noise figure measurements. From data gathered, a methodology for effectively designing a practical low noise amplifier that is optimized for a given noise is then presented.
Introduction -- Noise -- Low noise amplifier -- Design and implementation -- Measurement and data gathering -- Results and analysis -- Conclusions and recommendations.
"October 2005."
Thesis (M.S. Electrical Engineering)--University of the Philippines Diliman.
Keywords: Low noise amplifiers -- Design and construction; Metal oxide semiconductors, Complementary