Characterization, comparison and analysis of monolithic inductors in silicon for RF IC's - Rosales, Marc D. (2003)
Passive components implemented in digital CMOS is one of the major elements in any Radio Frequency CMOS research. The chip area this passive component occupies is very large compared to the area covered by the active component. Thus, this is enough reason to make a passive component a significant area of research. In addition, the performance of a passive element like an inductor greatly influences the overall system performance. This thesis focuses on the design, implementation, characterization and analysis of spiral inductors on a heavily doped silicon substrate using a 0.25 um CMOS process. The inductors were designed using Spiral Calc, Asitic and Virtuoso Layout Editor. A total of 23 structures were fabricated on an 8.942 mm(squared) die. The inductor test chip consisted a total of 19 spiral inductor structures and four structures for measurement calibration and test structure de-embedding. The inductor structures that were implemented included planar square spiral structures, planar octagonal spiral structures and multi-level square spiral structures. Some of these inductors had Q enhancement structures consisting of patterned ground shield, metal halos, multiple metal layers and a combination of multiple metal layers and patterned group shield. All inductors were placed inside a test fixture with group-signal-ground (GSG) probe pads. The additional structures implemented for measurement calibration and test fixture de-embedding included text fixtures with open GSG pads, shorted GSG pads, and thru GSG pads. The inductors including their Q enhancement structures were characterized using a network analyzer. A micromanipulator with microwave coplanar GSG probes, a Hewlett Packard network analyzer and post data processing using customized Matlab functions were used for de-embedding and extraction of the inductance, the structure parasitics and the Q-factor of the inductors. The generated data from the above set-up was used to produce two sets of plots for analysis and comparison. The first set was the set of measured data, where the effects of different de-embedding techniques were compared. The next set of plots involved the data generated from simulations using ASITIC, inductance formulas, inductor models and the measured data. The inductor design tools, models and formulas were compared and verified with actual measured data.
Thesis (M.S. Electrical Engineering)--University of the Philippines, Diliman.
Keywords: Electric inductors; Metal oxide semiconductors, Complementary; Silicon -- Electric properties