Understanding the effect of surface flaws on fracture of silicon die - Punzalan, Jaime Jr. C. (2003)
An integrated circuit (IC) silicon die experiences different thermomechanical stresses during assembly, test, mounting and application. Ideally, the silicon dice is expected to withstand stresses induced during normal processing and application. But it is not uncommon for standard assembled package and flip chip package to fail due to silicon die cracking. As the industry continues to develop smaller and thinner silicon dice to fit the ever shrinking IC unit, understanding of the failure mechanism becomes more important.
Surface flaws often encountered in high volume manufacturing environment of plastics assembly were simulated using highly automated equipment in semiconductor packaging. Two experiments were undertaken : 1) varying sizes of ejector pin damage induced by different set-ups on bonded (111) wafer and 2) a 2k factorial experiment with backgrind, saw, ejector pin damage as factors on a standard (111) wafer. The fracture strength of the silicon dice with surface flaws were measured using four point bend test and quantified as a function of degree of surface damage. Samples were splitted at DTFS to determine the effect of fulcrum stress due to debris. Effect of surface flaws on silicon fracture strength was validated using thermal stress tests. Finally, fractography of silicon samples established whether the failure was influenced by the presence of surface flaws.
Fracture strength measurements through four point bend test were correlated with the reliability stress test based on average readings, standard deviation, and failure mode. The critical crack size for bonded wafers was determined to be 36.5 x 8.41 x 4.0 microns which was the smallest tool mark measured from lots with failures at reliability test. For the factorial experiment on standard wafers, it was found out the backgrind surface finish and ejector pin damaged had the highest effect on fracture strength.
Based on the reliability test results, fulcrum stress at DTFS did not pose any reliability risk if there was no surface damage on the silicon dice. The fulcrum stress was generated by debris that neither caused package crack nor left any tool mark. On the other hand, silicon with surface flaw showed failures. Failure rate at thermal shock test of silicon with surface damage increased when subjected to fulcrum stress.
Through fractography of fracture surfaces, the influence of surface flaws on the mechanism of crack propagation was verified. Further study of silicon that were used in fracture strength testing and from units that failed in reliability tests revealed distinct fracture surface features for the different thermal stress tests performed.
Thesis (M.S. Materials Science and Engineering)--University of the Philippines Diliman.