Finite state machines in hardware theory and design (with VHDL and SystemVerilog)

Finite state machines in hardware theory and design (with VHDL and SystemVerilog)

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Détails bibliographiques
Auteur principal: Pedroni, Volnei A. (Auteur)
Format: Electronic Resource
Langue:English
Publié: Cambridge, Massachusetts The MIT Press [2013]
Sujets:
Electronic books.
SystemVerilog (Computer hardware description language)
VHDL (Computer hardware description language)
Sequential machine theory > Data processing.
Computer systems > Mathematical models.
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