Finite state machines in hardware theory and design (with VHDL and SystemVerilog)

Finite state machines in hardware theory and design (with VHDL and SystemVerilog)

Veure totes les versions (2)
Dades bibliogràfiques
Autor principal: Pedroni, Volnei A. (Autor)
Format: Electronic Resource
Idioma:English
Publicat: Cambridge, Massachusetts The MIT Press [2013]
Matèries:
Electronic books.
SystemVerilog (Computer hardware description language)
VHDL (Computer hardware description language)
Sequential machine theory > Data processing.
Computer systems > Mathematical models.
Accés en línia:Click here to access thru EZproxy
Click here to access