Cita APA (7th ed.)

Sacayanan, J. M., & Noche, J. R. (2002). Modeling of delay-insensitive circuit building-blocks using the Hamburg design system. Philippine Engineering Journal.

Cita Chicago (17th ed.)

Sacayanan, Jesse M., i Joel R. Noche. "Modeling of Delay-insensitive Circuit Building-blocks Using the Hamburg Design System." Philippine Engineering Journal 2002.

Cita MLA (9th ed.)

Sacayanan, Jesse M., i Joel R. Noche. "Modeling of Delay-insensitive Circuit Building-blocks Using the Hamburg Design System." Philippine Engineering Journal, 2002.