Search Results - Pedroni, Volnei A.

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  1. 1

    Finite state machines in hardware theory and design (with VHDL and SystemVerilog) by Pedroni, Volnei A.

    Published 2013
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  2. 2

    Circuit design and simulation with VHDL by Pedroni, Volnei A.

    Published 2010
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  3. 3

    Finite state machines in hardware theory and design (with VHDL and SystemVerilog) by Pedroni, Volnei A.

    Published 2013
    Available for University of the Philippines Diliman via MIT Press Direct. Click here to access
    Also available remotely for University of the Philippines Diliman via MIT Press Direct. Click here to access thru EZproxy
    Electronic Resource


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